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| Image | Part Number | Manufacturer | Description | Datasheet Download |
|---|---|---|---|---|
| ATATMELSTUDIO | Atmel | ATMEL STUDIO DVD Learn More Datasheet | ATATMELSTUDIO.pdf | |
| ATA6670-EK | Atmel | ATMEL ATA6670-EK DEV BOARD Learn More Datasheet | ATA6670-EK.pdf | |
| AT97SC3204-X2DB16-00 | Atmel | C7B HARI LPC DAUGHTER BOARD CEK Learn More Datasheet | AT97SC3204-X2DB16-00.pdf | |
| AT97SC3204-X1DB190 | Atmel | C7-FARH LPC EVAL DAUGHTER BOARD Learn More Datasheet | AT97SC3204-X1DB190.pdf | |
| EFR-DI-JESD204-SITE | Xilinx | JESD204 IP CORE Learn More Datasheet | EFR-DI-JESD204-SITE.pdf | |
| EFR-DI-INTERLEAV-SITE | Xilinx | INTERLEAVER/DE-INTERLEAVER IP Learn More Datasheet | EFR-DI-INTERLEAV-SITE.pdf | |
| EFR-DI-IMG-STATS-SITE | Xilinx | IMAGE STATISTICS ENGINE IP CORE Learn More Datasheet | EFR-DI-IMG-STATS-SITE.pdf | |
| EFR-DI-IMG-NOISE-SITE | Xilinx | IMAGE NOISE REDUCTION IP CORE Learn More Datasheet | EFR-DI-IMG-NOISE-SITE.pdf | |
| EFR-DI-IMG-MA-NOISE-SITE | Xilinx | MOTION ADAPTIVE NOISE REDUCTION Learn More Datasheet | EFR-DI-IMG-MA-NOISE-SITE.pdf | |
| EFR-DI-IMG-ENHANCE-SITE | Xilinx | IMAGE EDGE ENHANCEMENT IP CORE Learn More Datasheet | EFR-DI-IMG-ENHANCE-SITE.pdf | |
| EFR-DI-IMG-CHAR-SITE | Xilinx | IMAGE CHARACTERIZATION IP CORE Learn More Datasheet | EFR-DI-IMG-CHAR-SITE.pdf | |
| EFR-DI-GAMMA-SITE | Xilinx | GAMMA CORRECTION IP CORE Learn More Datasheet | EFR-DI-GAMMA-SITE.pdf | |
| EFR-DI-EAVB-EPT-SITE | Xilinx | ETHERNET AVB ENDPOINT IP CORE Learn More Datasheet | EFR-DI-EAVB-EPT-SITE.pdf | |
| EFR-DI-DISPLAYPORT-SITE | Xilinx | DISPLAYPORT IP CORE Learn More Datasheet | EFR-DI-DISPLAYPORT-SITE.pdf | |
| EFR-DI-VID-DMA-SITE | Xilinx | VIDEO DMA IP CORE Learn More Datasheet | EFR-DI-VID-DMA-SITE.pdf | |
| EFR-DI-USB2-DEVICE-SITE | Xilinx | USB 2.0 DEVICE IP CORE Learn More Datasheet | EFR-DI-USB2-DEVICE-SITE.pdf | |
| EFR-DI-TCCENC-UMTS-SITE | Xilinx | TURBO CONVOLUTIONAL ENCODER IP Learn More Datasheet | EFR-DI-TCCENC-UMTS-SITE.pdf | |
| EFR-DI-TCCENC-SITE | Xilinx | TURBO CONVOLUTIONAL ENCODER IP Learn More Datasheet | EFR-DI-TCCENC-SITE.pdf | |
| EFR-DI-TCCENC-LTE-SITE | Xilinx | 3GPP LTE TURBO ENCODER IP CORE Learn More Datasheet | EFR-DI-TCCENC-LTE-SITE.pdf | |
| EFR-DI-TCCDEC-UMTS-SITE | Xilinx | TURBO CONVOLUTIONAL DECODER IP Learn More Datasheet | EFR-DI-TCCDEC-UMTS-SITE.pdf | |
| EFR-DI-TCCDEC-SITE | Xilinx | TURBO CONVOLUTIONAL DECODER IP Learn More Datasheet | EFR-DI-TCCDEC-SITE.pdf | |
| EFR-DI-SPDIF-SITE | Xilinx | SPDIF CONTROLLER IP CORE Learn More Datasheet | EFR-DI-SPDIF-SITE.pdf | |
| EFR-DI-RSE-SITE | Xilinx | REED SOLOMON ENCODER IP CORE Learn More Datasheet | EFR-DI-RSE-SITE.pdf | |
| EFR-DI-RSD-SITE | Xilinx | REED SOLOMON DECODER IP CORE Learn More Datasheet | EFR-DI-RSD-SITE.pdf | |
| EF-DI-TCCDEC-UMTS-WW | Xilinx | TURBO CONVOLUTIONAL DECODER IP Learn More Datasheet | EF-DI-TCCDEC-UMTS-WW.pdf | |
| EF-DI-MM-TCC-DEC-SITE | Xilinx | 3GPP MIXED MODE TURBO DECODER IP Learn More Datasheet | EF-DI-MM-TCC-DEC-SITE.pdf | |
| EFR-DI-RIO-PHY-SITE | Xilinx | RAPIDIO PHYSICAL LAYER INTERFACE Learn More Datasheet | EFR-DI-RIO-PHY-SITE.pdf | |
| EFR-DI-RIO-LOG-SITE | Xilinx | RAPIDIO LOGICAL I/O INTERFACE IP Learn More Datasheet | EFR-DI-RIO-LOG-SITE.pdf | |
| EFR-DI-RACH-LTE-SITE | Xilinx | LTE RACH DETECTOR IP CORE Learn More Datasheet | EFR-DI-RACH-LTE-SITE.pdf | |
| EFR-DI-PUCCH-REC-LTE-SITE | Xilinx | 3GPP LTE PUCCH RECEIVER IP CORE Learn More Datasheet | EFR-DI-PUCCH-REC-LTE-SITE.pdf | |
| EFR-DI-CCM-SITE | Xilinx | COLOR CORRECTION MATRIX IP CORE Learn More Datasheet | EFR-DI-CCM-SITE.pdf | |
| EFR-DI-CAN-XC-SITE | Xilinx | CAN NON-AUTOMOTIVE APPS IP CORE Learn More Datasheet | EFR-DI-CAN-XC-SITE.pdf | |
| EFR-DI-PCI32-SP-PROJ | Xilinx | 32BIT INITIATOR/TARGET SPARTAN Learn More Datasheet | EFR-DI-PCI32-SP-PROJ.pdf | |
| EFR-DI-PCI32-IP-SITE | Xilinx | 32BIT INITIATOR/TARGET PCI IP Learn More Datasheet | EFR-DI-PCI32-IP-SITE.pdf | |
| EFR-DI-PCI-AL-SITE | Xilinx | 32/64BIT INITIATOR/TARGET PCI IP Learn More Datasheet | EFR-DI-PCI-AL-SITE.pdf | |
| EFR-DI-PC-CFR-SITE | Xilinx | PEAK CANCELLATION CFR IP CORE Learn More Datasheet | EFR-DI-PC-CFR-SITE.pdf | |
| EFR-DI-OSD-SITE | Xilinx | ON-SCREEN DISPLAY IP CORE Learn More Datasheet | EFR-DI-OSD-SITE.pdf | |
| EFR-DI-OBSAI-SITE | Xilinx | OBSAI IP CORE Learn More Datasheet | EFR-DI-OBSAI-SITE.pdf | |
| EFR-DI-MM-TCC-DEC-SITE | Xilinx | 3GPP MIXED MODULE TURBO DECODER Learn More Datasheet | EFR-DI-MM-TCC-DEC-SITE.pdf | |
| EFR-DI-MIMOENC-LTE-SITE | Xilinx | 3GPP LTE MIMO ENCODER IP CORE Learn More Datasheet | EFR-DI-MIMOENC-LTE-SITE.pdf | |
| EFR-DI-MIMODEC-LTE-SITE | Xilinx | 3GPP LTE MIMO DECODER IP CORE Learn More Datasheet | EFR-DI-MIMODEC-LTE-SITE.pdf | |
| EFR-DI-LTE-FFT-SITE | Xilinx | LTE FAST FOURIER TRANSFORM IP Learn More Datasheet | EFR-DI-LTE-FFT-SITE.pdf | |
| EFR-DI-POSL4MC-SITE | Xilinx | SPI-4.2 LINK LAYER INTERFACE IP Learn More Datasheet | EFR-DI-POSL4MC-SITE.pdf | |
| EFR-DI-CAN-XA-SITE | Xilinx | CAN AUTOMOTIVE APPS IP CORE Learn More Datasheet | EFR-DI-CAN-XA-SITE.pdf | |
| EFR-DI-PCIX64-VE-SITE | Xilinx | 32/64BIT INITIATOR/TARGET PCI IP Learn More Datasheet | EFR-DI-PCIX64-VE-SITE.pdf | |
| EFR-DI-10GEMAC-SITE | Xilinx | 10 GIGABIT ETHERNET MAC IP CORE Learn More Datasheet | EFR-DI-10GEMAC-SITE.pdf | |
| EFR-DI-PCIX-V5-SITE | Xilinx | 64BIT INITIATOR/TARGET PCI-X IP Learn More Datasheet | EFR-DI-PCIX-V5-SITE.pdf | |
| EFR-DI-10GEMAC-PROJ | Xilinx | 10 GIGABIT ETHERNET MAC IP CORE Learn More Datasheet | EFR-DI-10GEMAC-PROJ.pdf | |
| EFR-DI-PCIEXP-SITE | Xilinx | PCI EXPRESS ENDPOINT IP CORE Learn More Datasheet | EFR-DI-PCIEXP-SITE.pdf | |
| EFR-DI-10-100-EMAC-SITE | Xilinx | 10/100 ETHERNET MAC IP CORE Learn More Datasheet | EFR-DI-10-100-EMAC-SITE.pdf |