Nexperia has announced a second generation of 650V gallium nitride power transistors, claiming reduced on-resistance and, with its surface-mount copper clip package (right), reduced inductance.

Called ‘H2′, the parts are AEC-Q101-qualified for automotive applications, and the second-generation die are also available in TO-247 for industrial use.

“Customers need a solution for power conversion at 650V and around 30-40mΩ Rds(on), where applications include on-board chargers, dc-dc converters and traction inverters in electric vehicles,” said Nexperia marketing director Dilder Chowdhury, adding that the other significant need is in 1.5 – 5kW ’80 Plus Titanium’-grade rack-mounted telecoms, 5G and data centre PSUs.

The company already has a 50mΩ GaN hemt (high electron mobility transistor) built on its H1 process and was developing 35mΩ version, Chowdhury told Electronics Weekly. However, reducing the resistance required a big die, making it expensive – made worse because H1 technology has a floating substrate that needs an elaborate package which includes an internal insulating shim to isolate the back of GaN die.

Moving to H2 technology, which has through-epi vias, produced a 24% smaller 35mΩ die and did away with the need for a shim.

Nexperia-H2-GaN-tableThere are three 650V H2 parts (table right)

Rds(on) is 35mΩ (typical at 25°C, 41mΩ max) in the traditional TO-247 package.

This drops to 33mΩ (typical at 25°C, 39mΩ max) with the two surface-mount CCPAK versions – one optimised for top cooling, and the other for bottom cooling (T and B in the product names).

TO-247 and bottom-cooled SMD are sampling now, with with the top-cooled version to follow. 25°C ratings are 47.2A and 187W for the TO-247 and a provisional 60A and 300W for the bottom-cooled SMD.

CC in the package name is for ‘copper clip’ – replacing bond wires with shaped copper strips.

According to Chowdhury, inductance is under 2nH in the copper clip package. “There is no point in having a fantastic semiconductor with a poor package,” he said.

Thermal resistance is <0.5K/W for the surface-mount types, compared with 0.8K/W for the TO-247. The TO-247 is rated for use with 150°C at the junction, while CCPAK versions will operate up to 175°C.

Being gull-wing (top photo), the CCPAK allows some flex to reduce the stress from thermal cycling and eases automatic optical inspection – two factors that put it above QFN pacakges for automotive use said Chowdhury.

To achieve a normally-off operation, Nexperia’s GaN transistors are actually a cascode combination of two transistors in the same package.

Inside the die are stacked, with the small silicon mosfet on top of the hemt source. Copper clips take the hemt drain and mosfet source to the outside world.

Nexperia-GaN-hemt-cascode automotiveCascode connection (right), used by other companies including Transphorm for GaN and UnitedSiC for silicon carbide transistors, pairs a normally-on (depletion mode) GaN hemt or SiC jfet high-voltage transistor with a low-voltage normally-off (enhancement mode) silicon mosfet. The mosfet switches the hemt or jfet source terminal to the package source connection.

There are pros and cons for cascode-connected depletion mode devices, and there are pros and cons for single-transistor enhancement mode GaN or SiC high-voltage transistors. All manufactures have their own arguments for picking the technology they sell.

For his part, Chowdhury points to the benign gate characteristics of a cascode-connected pair – the gate is simply a silicon mosfet gate, which people have been driving for two decades.

“We make the gate threshold equal to 4V, so you have no worry about shoot-through or gate bounce,” he said, claiming: “An enhancement-mode GaN transistor has a threshold of around a volt” – and is therefor vulnerable to dV/dt switch-on through Miller action, is the implication.

A criticism of co-packaged cascode-connected transistors is that there is no access to the hemt gate, so no way to control the arbitrarily rapid turn-on.

Nexperia is amongst the companies that gets a grip on this by designing the depletion-mode high-voltage transistor and silicon mosfet together as a dynamically-matched pair, and Chowdhury claims its matching is even finer because Nexperia makes its GaN transistors in-house, compared with fabless companies that have to use a  foundry. Then, “because the low-voltage silicon is in our control, we can design everything to match our hemt”, he said.

The result is, with H2, he said, “if you want to slow slew-rate, the designer can control the speed of the device with gate resistor or reduced drive voltage: turn-off is 119V/ns with 3Ω to 20V/ns with 120Ω; apply 0-8V to the gate for slow switching, or 0-10V, or 0-12V”.

GaN hemts are criticised for not having the safe avalanche capability that allows a silicon mosfet to survive occasional over-spec voltage spikes – spikes that should never occur in a well designed circuit, but should also not result in instant destruction if, for some odd reason, one does occur.

The answer for GaN transistor makers, whose transistors will be damaged if they are forced to avalanche, is to build-in voltage tolerance above the nominal rated voltage.

In H2, the field plate that covers the drain and source “is designed in such a way to get break-down way above 650V. It is a very well designed field plate”, said Chowdhury, giving his GaN transistor “800V voltage transient capability for up to 1μs every switching cycle – the spikes are usually 5ns”. If a spike goes above this, up to 1kV, then H2 device leakage will rise momentarily, then return to its base value, he added.

While the GaN transistor is made in-house at Nexperia, using bought-in GaN-on-silicon wafers, the more straight-forward silicon mosfet is made at a foundry.

Is anything happening with GaN-on-sapphire?

Not yet, said Chodhury: “GaN-on-sapphire is difficult because it is transparent, and the substrate has low thermal conductivity. It is a prospect for 1,200V devices.”

One of the advantages of GaN hemts compared with silicon mosfets is that hemts lack the intrinsic source-drain diode that mosfets must include. This diode has a reverse-recovery charge (Qrr) – allowing the mosfet to briefly conduct ‘backwards’ when switching. Hemts don’t have this diode, so they can switch fast with no reverse-recovery current spike.

However, the cascode connection re-introduces a silicon mosfet into the circuit.

“Qrr is voltage dependent,” said Chowdhury. “The 30V silicon device has less than one tenth the Qrr: around 170uC compared with 3,000uC for a 650V silicon mosfet.”

This lack of reverse recovery charge, or reduced reverse recovery charge, is one reason that GaN can be used in fast hard-switched power converters, in situations where high-voltage silicon mosfets might need a more complex quasi-resonant topology.

For example, Nexperia is proposing hard-switched GaN bi-directional phase-shift full bridge converters for the on-board chargers of electric vehicles. With a bi-directional charger, excess charge can be pushed back into the home or grid (‘vehicle-to-grid’) without additional hardware.

Chowdhury argues that silicon power transistors will initially be used in automotive chargers, auxillary (400V to 48V or 12V) converters and traction motor drives, but will be edged out by smaller more efficient hard-switched GaN, and perhaps SiC, units with lower system costs.

He doesn’t think silicon will ever compete on size: “GaN is all about low switching losses. You can move to a higher frequency – 300kHz to 500kHz against 66kHz for silicon. Even if the converter is resonant, you will have to go interleaved to get same efficiency with silicon – you can half the number of components with GaN.” And if the converter is resonant “you lose bi-directional – you have to add another converter.”