DAC 2020 takes a virtual look at design challenges

Author: EIS Release Date: Jul 24, 2020


The Covid-19 pandemic has meant that the Design Automation Conference (DAC) will be a virtual exhibition and conference this year. It will take place from Monday 20 July to Friday 24 July.

Highlights of the show is a keynote on the opening morning by Philip Wong, chief scientist, TSCMC: Semiconductor Technology: A System Perspective on Monday 20 July 9.20am (US Pacific time) and a keynote on Tuesday: RISC-V Revolution and Momentum by Calista Redmond, CEO of RISC-V International (9.20am Pacific time)

There will be tutorials covering a range of interest areas from design challenges for design challenges for algorithm, timing and power and relating to specific applications, such as FPGAs, IP security and AI.

On Monday (10.30am – 12 noon) Shrenik Mehta, SafeSecure, Arm’s Ghani Kanawati, SafeSecure’s  Shrenik Mehta and Qualcomm’s Nir Maor will take part in the tutorial: Present and Future Functional Safety Lifecycle for Autonomous Vehicles

Other tutorials cover System level power analysis, optimisation methods and tools for neural nets, optimisation methods and tools for training neural nets and IBM’s Toby Cappel will present a Sky Talk Succeeding with AI Today and Tomorrow (12.30pm).

Following the keynote on Tuesday, there is a series of RISC-V Theater presentations, from a selection of companies including Microchip, UltraSoC and OneSpin. There is also an IP Track Session, chaired by Brent Sherman, chair of the IP Security Assurance (IPSA) working group, which will focus on security concerns in IP  and include a discussion on third-party IP security risks associated with FPGA bitstream integration.

On Thursday 23 July from 12 noon, the Accellera Systems Initiative will present an update on the standardisation of functional safety. The industry organisation created the Functional Safety Working Group to develop a comprehensive and unified standard to improve automation, interoperability and traceability across the development of electronic circuits and systems. At the virtual lunch event, there will be an overview of developments to date and presentations by functional safety experts, including Bala Chavali (AMD), Ghani Kanawati (Arm), Jyotika Athavale (Intel), Franck Galtié (NXP Semiconductors) and Riccardo Vincelli, (Renesas). The event will finish with a live Q&A session.

On Monday afternoon, there will be the presentation of the DAC awards (5pm) recognising ACM/IEEE and DAC award recipients.

Attendees can register to attend at the DAC 2020 website.

For more updates on the EDA industry, Electronics Weekly will publish a design software/EDA feature in the 12 August issue.