CML Microcircuits of Essex has introduced a single chip 24bit fractional-N RF synthesiser with VCO for generating RF signals over a continuous range of 49MHz to 2.04GHz.

CML-CMX940-rf-synth
Called CMX940, it is aimed at wireless systems including PMR (private mobile radio), data modems and marine radios.
“CML has implemented a dual-loop architecture with a configurable reference path, consisting of a separate PLL and VCO, used to minimise close-in phase noise and mitigate integer and fractional boundary spurious,” according to the company. “Managing phase noise and spurious performance are fundamental to meeting international, including ETSI, radio standards such as EN 300 113 and EN 300 086, mandated for narrow-band systems.”
The internal VCO operates from 2.72 – 4.08GHz, or alternatively an external 100MHz – 2GHz VCO.

To optimise loop response per application, the phase locked loop (PLL) requires external loop filter components.
The PLL reference clock is sourced from a second PLL (see diagram) which integrates a 600MHz – 1.2GHz fixed-frequency VCO (‘RVCO’) with on-chip loop filter components and only requires one external VCO tuning inductor. It needs an external 10MHz – 40MHz master reference clock.
“Innovative techniques have been used to provide an exceptionally low noise method of multiplying the master reference frequency,” said CML. “This multiplier, when combined with the cascaded PLL source and reference dividers gives the user the option to avoid integer boundary spurs.”
At carrier frequency of 500MHz the typical phase noise is -124dBc/Hz at 12.5kHz offset and spurious products are better than -75dBc.
The synthesizer includes a lock detect, fast lock functions and automatic calibration.
There is a programmable synthesizer VCO output divider and dual variable gain output buffers, with linear gain control, which are intended to provide the local oscillator frequency sources to the Rx and Tx paths within a system.
Operation is from 3.0 to 3.6V, drawing between 23mA and 64mA depending on configuration.