Analog Devices' EV-ADF4401ASD2Z evaluates the performance of the ADF4401A SiP for offset phase-locked loops (PLLs). The EV-ADF4401ASD2Z contains the ADF4401A integrated SiP, phase frequency detector (PFD), active loop filter, power supply connectors, and subminiature version A (SMA) connectors.

The EV-ADF4401ASD2Z requires an EVAL-SDP-CS1Z (SDP-S) system demonstration platform (SDP), which allows software programming of the EV-ADF4401ASD2Z.

The ADF4401A is a fully integrated and ready to use translation loop (also known as an offset loop) SiP used for frequency synthesis in highly jitter sensitive applications. It reduces board space and complexity compared to traditional discrete translation loop solutions designed on a PCB. Time-to-market is significantly reduced by taking advantage of this highly integrated solution with in-package circuitry and enhanced isolation that attenuate spurious components. The isolation within the chip and between the mixer's LO input and the rest of the signal path is done and proven on the ADF4401A..

Features

• Lowest noise solution for excellent instrumentation and highly competitive applications with sub-10 fs_(rms) wideband jitter
• High Integration in a small 18 mm x 18 mm LGA package
• Low spurs and feedthrough reduced design complexity (90 dBc LO_IN to RF output; 90 dBc spurious-free dynamic range)

Applications

• Instrumentation: 5G wideband testers, ETM, communications test equipment
• Aerospace and defense: MilCom, electronic warfare