A monolithic GaN mains power converter IC was the target of Leibniz University Hannover, which worked with Texas Instruments.
And the result is a 15W off-line PSU that can feed a 30-60V LED string with 140‑190mA from 60-400V AC or DC. Efficiency is 95.6% at low input voltage, and not dropping below 87.8% all the way to 400V.

A monolithic GaN mains power converter IC was the target of Leibniz University Hannover, which worked with Texas Instruments.

And the result is a 15W off-line PSU that can feed a 30-60V LED string with 140‑190mA from 60-400V AC or DC. Efficiency is 95.6% at low input voltage, and not dropping below 87.8% all the way to 400V.

All active components including the 650V power switch and the chip’s own auxiliary PSU are integrated on the same GaN die. The only exceptions are a few diodes, including a silicon carbide diode in the output circuit. Two major challenges for the designers were the lack of any viable p-type GaN transistors – so no CMOS circuits – and the poor matching of GaN transistors due to the material’s high defect density.

The first of these was tackled by reverting to pre-CMOS technology: resistor-transistor logic, where a resistor is used instead of a p-type transistor to pull outputs to the positive rail.

Where high-current pull-up was required, for example to drive the main power transistor gate, local charge pumps have been implemented to give a higher-than-Vdd drive for the gates of n-type transistors connected to the Vdd rail.

The buck converter operates in boundary conduction mode, with the power transistor controlled by a flip‑flop – turning on when the current in the main inductor reaches zero and off again when the current through the inductor and transistor reaches a set value.

Zero current is sensed by coupling the rapidly changing main switch drain voltage at that moment through a capacitor and Schmidt trigger into one side of the flip-flop. As the trigger is on the low-voltage side of the chip, the capacitor needs to block many hundreds of volts and so has been integrated as a metal fringe capacitor – made from interdigitated fingers on a single layer of metal with insulation above and below.

The desired peak current for turn-off is sensed from the voltage ramp across an external 1Ω current-sense resistor.

This is done using a comparator that feeds the other side of the flip-flop, and it is in the differential pair at the input of this comparator where the lack of matched transistors bites – as the natural offset voltage across the pair is over 200mV, far too high for the precision required.

To get around this lack of matching, an auto-zero scheme has been implemented that reduces the offset to 20mV – something that took considerable ingenuity as n-channel GaN transistors needed to be pressed into service as series switches for the offset storage capacitors.

Overall, the comparator is fast and only introduces 50ns of delay into the loop – about the same as the gate driver stage, itself an ingenious design that runs from the single 6V Vdd rail and matches on and off delays for the main transistor gate.

That on-chip Vdd rail powers everything on the chip, where 6V has been chosen to be high enough to drive the output device at high speed, but low enough not to forward-bias the gates of the GaN transistors. It is stored on an external 470nF capacitor (Caux) fed through a small high-voltage transistor from the main switch drain.

This charge route conducts when the main switch transistor is off, and the small transistor is both current and voltage regulated so that the capacitor is not over-charged. Even including droop when the charging path is blocked, ripple is under 50mV.