Semidynamics has announced a customisable vector unit for RISC-V processor cores, compliant with RISC-V vector specification 1.0.

Semidynamics RiscV vector unit
Vector unit are composed of several vector cores that perform multiple calculations in parallel.

In this case, Semidynamics’ vector core can be tailored to support FP64, FP32, FP16, BF16, INT64, INT32, INT16 or INT8 data types depending on requirements – the longest word-length implemented defines the vector core width (‘ELEN’).

Its vector units can have 4, 8, 16 or 32 cores, and total vector unit data path width (‘DLEN’ = ELEN x core count) can be between 128 and 2,048bit.

 

Within the vector unit, an all-to-all cross-vector-core network is available to connect up to 32 vector cores. “The cross-vector-core unit is used for specific instructions in the RISC-V standard that shuffle data between the different vector cores, such as vrgather and vslide,” according to Semidynamics.

Within the vector units, the number of bits of each vector register (VLEN) can be tailored beyond ‘1x’ (VLEN=DLEN) to 2x, 4x or 8x. “When the VLEN is larger than the DLEN, a vector operation uses multiple cycles to execute,” said the company. “For example, when VLEN=2,048 and DLEN=512, each vector arithmetic operation will take 4 clocks to execute. This is a great feature for tolerating large memory latencies and for reducing power.”

“Together, our technologies take RISC-V to a new level, with the fastest handling of big data currently available that will open up opportunities in application areas of high-performance computing such as video processing, AI and machine learning,” said Semidynamics CEO and founder Roger Espasa.

The vector unit is out-of-order, and pairs with Semidynamics’ out-of-order Atrevido 64bit RISC-V core. In-order cores are in the pipeline, and the company can provide special interfaces and protocols to match customer intellectual property.

Semidynamics was founded in 2016, is based in Barcelona Spain, and offers customisable RISC-V processor IP, specialising in high performance cores with vector units for machine learning and AI. Privately owned , it is a member of the RISC-V Alliance.

RISC-V Summit Europe is held in Barcelona over 5 to 9 June 2023. Find Semidynamics on stand 6.