SiFive has announced hardware trace and debug for RISC-V processor IP.

Called SiFive Insight, it is intended to, according to the company, “meet customer demand and expectations for the capability to access, observe, and control products deploying SiFive’s RISC-V Core IP portfolio”.

“SiFive Insight is the industry’s first integrated RISC-V processor core, trace, and debug IP solution from a single vendor,” said SiFive marketing director James Prior

Insight includes the C++ cross-platform Nexus 5001 trace decoder for RISC-V. It is available for all SiFive RISC-V Core IP product lines offered by the company’s Core Designer cloud-based tool to define and customise RISC-V processor cores.

IAR Systems’ software tools are to support Insight, as is Lauterbach’s TRACE32 debug and trace tool. “At Segger, we are making sure these Insight features can be leveraged using our J-Link debug probe and Ozone debugger,” said Segger founder Rolf Segger.

This might be the first of its kind from a single vendor, but Cambridge-based UltraSoC has been shipping trace and debug IP for RISC-V for two years.

“We have a debug module and a trace encoder for RISC-V,” UltraSoC CEO Rupert Baines told Electronics Weekly. “A key point is we are architecture agnostic: we support ISAs including RISC-V, Arm, ARC, Tensilica, MIPS and CEVA. That is particularly useful in this era of heterogeneous architectures – we have a lot of customers who use Arm + RISC-V, for example.

Last week, the RISC-V Foundation ratified its processor trace specification.

“Understanding a system’s program behaviour is often quite difficult, especially when working with complex systems for the high-performance computing, HPC, IOT, machine learning and artificial intelligence,” said RISC-V Foundation trace and debug committee chair Gajinder Panesar. “With the processor trace specification ratified, users are able to choose core vendors and trace encoder suppliers knowing tools vendors will support this standard moving forward.”

RISC-V member companies that contributed to the ratification of the processor trace specification include: Andes Tech, Blue Spec, Codasip, Esperanto, ETH Zurich, Seagate, SiFive, Syntacore, UltraSoC, Vedanta Micro and Western Digital.

Some of these already have compliant products.

The RISC-V Foundation’s processor trace task group is working on improvements to the trace ecosystem, to be propose to the committee.