System integrates pre-silicon and post-silicon verification

Author: EIS Release Date: Nov 8, 2023


Spirent and Cadence are to offer networking SoC verification software  that claims to bridge the gap between pre-silicon and post-silicon verification.

The collaboration brings virtual Ethernet traffic emulation and testing capabilities to pre-silicon verification in the Cadence Palladium Z2 Enterprise Emulation and Protium X2 Enterprise Prototyping systems.

The product  has the capacity to emulate any port speed from 1G to 800G at the application level, and  introduce additional features to enable new use cases as required.


The software is designed to enable the increasing data bandwidths needed to verify designs for data centres and other high-performance applications.


The partnership combines the data rates and port densities of Spirent TestCenter with the verification capabilities of the Cadence Palladium and Protium systems as a unified solution with reusable, portable, automated test cases.

Benefits  include:

Testing for pre-silicon validation from 1G to 800G for application-level testing,
Ingegration of the test application and emulation environment without the need for external test hardware,
Cost savings from identifying and fixing issues in early-stage chip design
A test platform that bridges gaps between pre- and post-silicon verification, enabling continuity of testing from the earliest phases of product development through customer deployment
Capability to test all phases of silicon product lifecycle, time-saving application re-utilization, implementation of standard metrics for more effective measurement and result analysis, and easy integration into CI/CD workflows,
Acceleration of the  silicon development lifecycle.