A question arose at Electronics Weekly after Rohm introduced an 8pad isolated for GaN transistors.

In the BM6GD11BFJ-LB data sheet is a half-bridge application circuit (figure 28, right, slightly modified for clarity).

It is a classic bootstrapped circuit (explained far below) for driving silicon mosfets, but the gates of GaN hemts are far fussier that Si mosfets: a little below 5V and they are not fully ‘on’, but driving a GaN gate at much more than 6V will permanently degrade it.

The bootstrap capacitor Cvcc2 needs to be charged from the low-side driver supply (across Cvcc4) via diode Db1, which could easily drop over a volt.

In detail, the question was: how can both gates be reliably driven at between 5V and 6V relative to their sources, if the bootstrap diode is going to drop a volt.

Rohm field application engineer Timothy Polom came to the rescue, explaining that the high reverse voltage drop of GaN hemts during the switching cycle dead-band is all important.

He said:

In general, the bootstrap voltage can be one diode [Db1] forward voltage less than the low-side Vdd voltage. As GaN hemt gate properties leave very little room for design margin, the designer is faced with a sensitive design problem, and each forward voltage offset can increase design risk.

Modified daig Rohm figure 28 GaN half bridgeThe architecture in Fig. 28 from the BM6GD11BFJ-LB datasheet [simplified right] was developed considering dead-time between alternating periods of high-side and low-side hemt conduction.

Consider a case in which both high-side and low-side hemts are gated low and are ‘off’, and an inductive current freewheels through the low-side hemt. In this case, the low-side HEMT is in third-quadrant conduction with a negative drain-source voltage. To understand the possible magnitude of this negative drain-source voltage, please check figures 11 and 12 from the GNP2070TD-Z datasheet [below] – this value depends on the inductor current level and hemt temperature.

Rohm GNP2070TD-Z 650V GaN hemt reverse conduction graph from GNP2070TD-Z data sheet Figures 11 and 12 from the 650V GaN hemt GNP2070TD-Z datasheet

The amplitude of the negative drain-source voltage of the low-side hemt is large – very likely a significant proportion of the ~6V maximum allowable hemt driving voltage – so there is a significant risk of over-charging the bootstrap capacitor, depending on deadtime period length.

Zener diode Db2, probably with a Zener voltage of 5.1 V, in parallel with the bootstrap capacitor Cvcc2 mitigates this risk.

The risk of under-charging the bootstrap capacitor due to Db1 forward voltage versus the risk of over-charging due to dead-time third-quadrant operation must be carefully analysed and balanced for each application.

Despite the complex problems involved with driving enhancement-mode GaN hets, however, we can solve the problems that arise.

What is high-side boot-strapping?
For the uninitiated, ‘boot-strapping’ in this case describes a way of getting power to the high-side driver by lifting charge using the half-bridge output waveform as a crane.

Modified daig Rohm figure 28 GaN half bridge

The high-side drive IC needs a power rail that is always above the source voltage of the upper GaN transistor which, in a mains power supply, might be at 0V one moment and at 600V the next (diagram left).

Capacitor Cvcc2 supplies this power throughout the dc-dc switching cycle, but can only be re-charged during one part of that cycle.

This re-charge happens via the bootstrap diode (Db1 in diagram) from the lower IC’s input power rail (lower Vcc2, across Cvcc4) which itself is supplied from an external power supply (regulated to 5 – 6V in the above case) relative to the system ground voltage.

Re-charge can only happen a moment when the mid-point of the two GaN hemts is equal to, or nearly equal to, the ground voltage. This is only true when the lower the hemt is conducting.

The issue above is that lower Vcc2 (across Cvcc4) might be regulated to its gate-friendly 5 – 6V but, on the face of it, the drop of the bootstrap diode will cause upper Vcc2 to end up at 4 – 5V, which is marginal at best.

Rohm BM6GD11BFJ gate driver half bridge app

Diagram note: The diagrams above are modified from the original BM6GD11BFJ-LB data sheet figure 28 (left) because the original, somewhat confusingly, uses a ground symbol (open triangle) for the mid-point of the two hemts – a point which is actually switching a square wave between (approximately) system ground and perhaps 600V in mains powered applications.

Electronics Weekly thanks Rohm for the technical advice, and distributor Rutronik for bringing this device to the attention of Electronics Weekly and helping to arrange contact with Timothy Polom.