Synaptics announced an AI MCU at Embedded World today, based around Arm’s Ethos-U55 NPU (neural processing unit) and Cortex-M55 CPU, plus a low-power Cortex-M4 CPU and Synaptic’s in-house mini-NPU.

Synaptics SR AI MCU block
“SR110 dynamically adjusts its compute power based on real-time system demands,” according to the company. “This context-aware computing enables ultra-low-power operation while maintaining high-performance AI capabilities when needed.”

There are three computation domains:

The sub-100μW always-on low-power domain is for continuously monitoring the environment, with the primary processors sleeping. “This domain is designed to detect both vision and audio events, such as motion, sound patterns or changes in lighting. It can generate wake-up triggers based on pre-programmed detection parameters,” said Synaptics.

Read all the latest news from Embedded World 2025 »

The sub-10mW real-time event detection domain uses the 100MHz Cortex-M4 and Synaptics NPU (up to 10Gop/s) for initial AI inferencing after an event is detected. It runs lightweight algorithms after wake-up to determine the nature of the event – object detection, sound event detection or other basic AI task.

When additional processing is required, such as for body pose estimation, complex facial recognition or object classification, the 400MHz Cortex M55 and 400MHz Ethos U-55 can be woken to deliver 100Gop/s – part of which comes from Arm Helium extensions in the Cortex-M55. Consumption remains under 100mW, said the company.

To support the processors are 3Mbyte of system memory, and 630kbyte of low-power memory for image and audio storage which can also be retained. There is also 16kbyte of always-on memory. Roughly half of the system memory can be retained in some low power modes.

Interfaces include: MIPI-CSI camera in and out, audio, 480Mbit/s USB 2.0 and up to 43 1.8V GPIOs. A wake input is provided to exit the lowest power sleep mode.

Security comes from one-time programmable memory, a random number generator and acceleration for AES-256, RSA-4096 and SHA-512.

Power can come from separate  3.3V and 1.8V external sources, or from a single 3 – 3.6V rail.

Packaging options include WLCSP and BGA.

There are two cut-down related parts: SR105 looses the Cortex-M4 and simple NPU, but retains the M55 and U55, while SR102 looses the EthosU55 as well.